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Figure 929 depicts the circuit symbol and the approximate construction of a typical n-channel enhancement-mode MOSFET The device has three terminals: the gate (analogous to the base in a BJT); the drain (analogous to the collector); and the source (analogous to the emitter) The bulk or substrate of the device is shown to be electrically connected to the source, and therefore does not appear in the electrical circuit diagram as a separate terminal The gate consists of a metal lm layer, separated from the p-type bulk by a thin oxide layer (hence the terminology metal-oxide-semiconductor) The drain and source are both constructed of n+ material Imagine now that the drain is connected to a positive voltage supply, VDD , and the source is connected to ground Since the p-type bulk is connected to the source, and hence to ground, the drain-bulk n+ p junction is strongly reversebiased The junction voltage for the pn+ junction formed by the bulk and the source is zero, since both are connected to ground Thus, the path between drain and source consists of two reverse-biased p-n junctions, and no current can ow This situation is depicted in Figure 930(a): in the absence of a gate voltage, the nchannel enhancement-mode MOSFET acts as an open circuit Thus, enhancementmode devices are normally off Suppose now that a positive voltage is applied to the gate; this voltage will create an electric eld in the direction shown in Figure 930(b) The effect of the electric eld is to repel positive charge carriers away from the surface of the p-type bulk, and to form a narrow channel near the surface of the bulk in which negative charge carriers dominate, and are available for conduction For a xed drain bias, the greater the strength of the externally applied electric eld (that is, the higher the gate voltage), the deeper the channel This behavior explains the terminology enhancement-mode, because the application of an external electric eld enhances the conduction in the channel by creating n-type charge carriers It should also be.

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Project ID A primary key for identifying projects (These identification numbers have been randomized to remove any chance of identifying a company) Project inactive time

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Although, you can install the Visual Studio and the Express Editions on any drive, the installation process installs around 500MB of files on your system drive Consequently, ensure that about 800MB of space is available for Visual Studio on your system drive at the start of the installation, regardless of the Visual Studio or the Express Edition s location..

Source + + + + + + + + + + + + Drain n n+ n+ Channel p Bulk (substrate)

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Total time (rounded to whole months) during the project elapsed time, in which no project activity took place This time, subtracted from project elapsed time, derives the actual time spent working on the project

When a gate voltage is applied, a conducting n-type channel is formed near the surface of the substrate; now current can flow from drain to source

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Note You can choose to install only VB .NET Express or C# Express, but we recommend both. The first one you install should take less then an 1 hour depending on your Internet connection, but the next one will take about a quarter of that time. If you are using the Express Editions, you will also need to download and install Visual Web Developer Express for our chapters on web programming. You can download all of the Express Editions from the Microsoft website at http://msdn.microsoft.com/vstudio.

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Source + + + + + + + + + + + + Drain n n+ n+ Pinched-off p channel Bulk (substrate)

A collection of generally sequential project phases whose name and number are determined by the control needs of the organization or organizations involved in the project A life cycle can be documented with a methodology (See also project effort breakdown )

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We recommend that your computer meet the following optional configuration:

If the drain-source voltage is kept fixed and the gate supply voltage is varied, the MOSFET will behave as a voltage-controlled resistor until the pinch-off condition is reached (see Figure 931(a))

If the drain and gate supply voltages are both varied, a family of curves (shown in Figure 931(b)) can be generated, illustrating the MOSFET cutoff, ohmic, saturation, and breakdown regions

clear why these devices are called eld-effect, since it is an external electric eld that determines the conduction properties of the transistor It is also possible to create depletion-mode devices in which an externally applied eld depletes the channel of charge carriers by reducing the effective channel width (see Section 96) Depletion-mode MOSFETs are normally on, and can be turned off by application of an external electric eld We shall discuss depletion-mode devices in the next section To complete this brief summary of the operation of MOS transistors we note that, in analogy with pnp bipolar transistors, it is also possible to construct pchannel MOSFETS In these transistors, conduction occurs in a channel formed in n-type bulk material via positive charge carriers Operation of the n-Channel Enhancement-Mode MOSFET To explain the operation of this family of transistors, we will mimic a laboratory experiment designed to generate the characteristic curves of the transistor, much as was done for the bipolar transistor The experiment is depicted in Figure 930(a) to (d), where each pair of gures depicts the test circuit and a corresponding

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All personnel effort that is directed toward the completion of a particular project including out-of-hours effort, whether paid or unpaid It includes the effort of client representatives in addition to that of information technology personnel A good test as to whether an activity constitutes project work effort is to ask the question: Would the activity be undertaken if there was no project It excludes nonproject activities such as: Public holidays Annual leave Sick leave Training (nonproject)

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