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AM and m/BAD m/BAC in Fig. 13-1.

26

LL _

Fig. 13-1

Fig. 5-27

hrb Lcb _

AXIOM 4:

The inverting ampli ers, summing circuits, and integrators described in the previous sections are used as building blocks to form analog computers for solving linear di erential equations. Di erentiators are avoided because of considerable e ect of noise despite its low level. To design a computing circuit, rst rearrange the di erential equation such that the highest existing derivative of the desired variable is on one side of the equation. Add integrators and ampli ers in cascade and in nested loops as shown in the following examples. In this section we use the notations x 0 dx=dt, x 00 d 2 x=dt2 and so on.

AXIOM 5:

hob (S)

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EXAMPLE 5.20 Design a circuit with x t as input to generate output y t which satis es the following equation: y 00 t 2y 0 t 3y t x t Step 1. Rearrange the di erential equation (27) as follows: y 00 x 2y 0 3y 28 27

AXIOM 6:

Step 2. Use the summer-integrator op amp #1 in Fig. 5-28 to integrate (28). Apply (24) to nd R1 ; R2 ; R3 and C1 such that output of op amp #1 is v1 y 0 . We let C1 1 mF and compute the resistors accordingly: R1 C1 1 R1 1 M

_ Zin Z in (b)

AXIOM 7:

29

Fig. 6-15

AXIOM 8:

to obtain v2 y at the output of op amp #2. 1 v2 dt y 0 dt y 30 v2 R4 C2 Step 4. Supply inputs to op amp #1 through the following connections. Feed v1 y 0 directly back to the R3 input of op amp #1. Pass v2 y through the unity gain inverting op amp #3 to generate y, and then feed it to the R2 input of op amp #1. Connect the voltage source x t to the R1 input of op amp #1. The complete circuit is shown in Fig. 5-28. EXAMPLE 5.21 Design an op amp circuit as an ideal voltage source v t satisfying the equation v 0 v 0 for t > 0, with v 0 1 V. Following the steps used in Example 5.20, the circuit of Fig. 5-29 with RC 1 s is assembled. The initial condition is entered when the switch is opened at t 0. The solution v t e t , t > 0, is observed at the output of the op amp.

AXIOM 9:

0 Now (1) may be substituted into (2) and the result solved for Zin vS =ie . Finally, Zin may be found as 0 the parallel combination of Zin and RE :

CHAP. 5]

If unequals are multiplied by the same negative number, the results are unequal in the opposite order.

Fig. 5-28

(b) By elimination of ie between (1) and (2) followed by rearrangement, Av (c) From (1), iL By KCL at the emitter node, ie iin 4

AXIOM 10:

Fig. 5-29

Now elimination of ie between (4) and (5) and rearrangement give hfb i Z 1 in Ai L iin RL G RE

A frequency-selective ampli er whose gain decreases from a nite value to zero as the frequency of the sinusoidal input increases from dc to in nity is called a low-pass lter. The plot of gain versus frequency is called a frequency response. An easy technique for nding the frequency response of lters will be developed in 13. The leaky integrator of Fig. 5-24 is a low-pass lter, as illustrated in the following example.

AXIOM 11:

EXAMPLE 5.22 In Example 5.18 let v1 sin ! t. Find jv2 j for ! 0; 10; 100; 103 ; 104 , and 105 rad/s. By repeating the procedure of Example 5.18, the frequency response is found and given in Table 5-1. response amplitude decreases with frequency. The circuit is a low-pass lter.

If unequals are divided by the same negative number, the results are unequal in the opposite order.

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